Majlesi Journal of Electrical Engineering A Hybrid Forward/Reverse Converter in Reversible Logic to Reduce Hardware Complexity of Residual Number System Volume 18 (2024) Issue 2, June 2024 2024 06 02 A Hybrid Forward/Reverse Converter in Reversible Logic to Reduce Hardware Complexity of Residual Number System 10.57647/j.mjee.2024.1802.29 EN Ailin Asadpour Department of Computer Engineering, Kerman Branch, Islamic Azad University, Kerman, Iran 0000-0003-0080-305X Amir Sabbagh Department of Computer Engineering, Kerman Branch, Islamic Azad University, Kerman, Iran 0000-0003-3603-9401 Azadeh Emrani Department of Computer Engineering, Shahid Bahonar University of Kerman, Kerman, Iran 0000-0001-9249-9029 Journal Article 2024 06 02 As an emerging technology, reversible computing enables the development of high-performance computing systems with low energy consumption. A residue number system (RNS) that performs arithmetic operations in parallel with error tolerance and no carry propagation requires forward and reverse converters to communicate with other digital circuits. Designing reversible forward and reverse converters using new technologies is very important due to their wide applications in implementing the RNS. These converters, which are the overhead of the system, increase energy consumption. This study proposes a hybrid converter conforming to reversible logic for the RNS. This hybrid converter unifies forward and reverse converters by sharing hardware and reversible gates. By using the mixed-radix conversion (MRC), the reverse conversion arithmetic relations adopt a similar format to that of the forward conversion arithmetic relations, and by the addition of a number of Fredkin gates and modifying the inputs, the reverse converter hardware is used to perform forward conversion. Based on the findings, the hybrid converter, which conformed to reversible logic for the moduli set {2^2n,2^n-1,2^(n+1)-1} and {2^n-1,2^n+1,2^2n+1}, decreased the quantum cost to 19.56% and 19.52%, respectively.