<?xml version="1.0" encoding="UTF-8"?><!DOCTYPE ArticleSet PUBLIC "-//NLM//DTD PubMed 2.7//EN" "https://dtd.nlm.nih.gov/ncbi/pubmed/in/PubMed.dtd">
<ArticleSet>
		<Article>
		<Journal>
			<PublisherName>Majlesi Journal of Electrical Engineering</PublisherName>
			<JournalTitle>A High-Speed High-Input Range Four Quadrant Analog Multiplier</JournalTitle>
			<Issn></Issn>
			<Volume>Volume 4 (2010)</Volume>
			<Issue>Issue 1, March 2010</Issue>
			<PubDate PubStatus="epublish">
                <Year>2024</Year>
                <Month>02</Month>
                <Day>26</Day>
			</PubDate>
		</Journal>
		<ArticleTitle>A High-Speed High-Input Range Four Quadrant Analog Multiplier</ArticleTitle>
		<VernacularTitle></VernacularTitle>
		<FirstPage></FirstPage>
		<LastPage></LastPage>
		<ELocationID EIdType="doi">10.1234/mjee.v4i1.2</ELocationID>
		<Language>EN</Language>
		<AuthorList>
            			<Author>
                				<FirstName>M.</FirstName>
				<LastName>Mokarram</LastName>
				<Affiliation>Microelectronics Research Laboratory Urmia</Affiliation>
				<Identifier Source="ORCID"></Identifier>
			</Author>
            			<Author>
                				<FirstName>A.</FirstName>
				<LastName>Khoei</LastName>
				<Affiliation></Affiliation>
				<Identifier Source="ORCID"></Identifier>
			</Author>
            			<Author>
                				<FirstName>Kh.</FirstName>
				<LastName>Hadidi</LastName>
				<Affiliation></Affiliation>
				<Identifier Source="ORCID"></Identifier>
			</Author>
            		</AuthorList>
		<PublicationType>Journal Article</PublicationType>
		<History>
			<PubDate PubStatus="received">
				<Year>2024</Year>
				<Month>02</Month>
				<Day>26</Day>
			</PubDate>
		</History>
		<Abstract>In this paper, a CMOS four quadrant multiplier based on flipped voltage follower and differential squaring circuit is presented. The proposed circuit has a compact architecture operating at a higher speed and a higher input voltage range compared to the previously presented structures. The transistors operate in the both saturation and ohmic regions. The circuit operates with a single supply voltage of 3.3V in a 0.35 µm CMOS technology where the total harmonic distortion (THD) is less than 1.1%, the linearity error is also less than 3%, -3db frequency is more than 180 MHz and the voltage input range is 3V . Simulation results are given to verify the functionality of the proposed multiplier.</Abstract>
		<ObjectList>
            			<Object Type="keyword">
				<Param Name="value">Analog multiplier</Param>
			</Object>
						<Object Type="keyword">
				<Param Name="value">four quadrant multiplier</Param>
			</Object>
						<Object Type="keyword">
				<Param Name="value">defuzzification</Param>
			</Object>
						<Object Type="keyword">
				<Param Name="value">CMOS.</Param>
			</Object>
					</ObjectList>
	</Article>
	</ArticleSet>
